Typically in FES applications, current pulses generated in a programmable current generator are applied to nerve tissue for stimulating the tissue through a plurality of selectable electrodes. For many applications, due to the required current pulse amplitudes and the impedance of the stimulated tissue and of the electrodes, a high compliance voltage is required for the stimulators. Compliance voltage is the voltage available at an electrode that can be used to force current to flow through the electrode and still maintain control of the electrode voltage.
In many applications measurements of the electrode voltages are necessary for maintaining the operational integrity of the stimulator circuits. Such samples would be required for example in the measurements and determination of tissue and electrode impedances as well as detecting the existence or absence of shorts or open circuits involving the electrodes. To accommodate digital processing circuitry typically utilized in biomedical devices, digitizing the analog signals normally sensed by the electrodes is often required. However, analog-to-digital converters (ADCs) are often designed using low voltage transistors for minimizing die area as well as power consumption. As a result, the high electrode voltages cannot be digitized directly. Attenuation of the electrode voltage to the input voltage range of the ADC is required.
A common technique to achieve attenuation is to use resistor voltage dividers to divide the high electrode voltage to a lower voltage. However, this technique is not suitable for an FES application since it will draw out current from the stimulator and hence, affecting the stimulation pulse amplitude as well as the output impedance of the stimulator. To alleviate these problems, a voltage buffer between the stimulator and the voltage divider can be added [See Lee, E., “High Voltage Tolerant Stimulation Monitoring Circuit in Conventional CMOS Process”, Proc. Of the IEEE 2009 Int. Custom Integrated Circuits Conference (CICC), pp. 93-96, September 2009]. However, such a voltage buffer is difficult to design due to the requirement for a high-voltage rail-to-rail operational amplifier (op amp).
Another possible technique is to use two switched-capacitors (SCs) as two separate resistors to form a voltage divider. In this way, no DC current is drawn out from the stimulator. However, the charge injection of the switches and the nonlinear parasitic capacitances at connection node of the two SCs will affect the accuracy of the attenuation gain as well as the linearity of the divider. Furthermore, an ADC usually has considerable input capacitance. When the ADC input is connected to the SC divider, it will affect the actual attenuation factor of the attenuator. Therefore, instead of using a simple SC voltage divider, a SC amplifier with a voltage gain equal to the required attenuation factor is typically used [See Lee, E., Dai, R., Reeves, N., and Yun, X., “A 36V Biphasic Stimulator with Electrode Monitoring Circuit”, Proc. of the 2012 IEEE Int. Symposium on Circuits and Systems, pp 1087-1090, May 2012]. The SC amplifier is not only used for driving the ADC but can also be used for eliminating the parasitic capacitance effects and possibly the charge injection effects. However, this design requires additional power to power the SC amplifier.
Among different ADC architectures, successive approximation ADCs using a SC array digital to analog converter is a popular architecture for biomedical applications since it requires low power consumption for the sampling rate required in most biomedical devices. Based on this type of ADC, one can combine the attenuation function into the ADC. An additional switched-capacitor can be added in series with the SC array at the input of the original ADC architecture [Thomas Paul Kearney, “Programmable Input Range SAR ADC”, U.S. Pat. No. 6,731,232]. By properly controlling the clock phases, attenuation can be achieved. Since now the input capacitance of the ADC (capacitance of the SC array) becomes part of the attenuator, no buffer or SC amplifier is required to drive the ADC input. However, the accuracy of the attenuation factor is still affected due to the nonlinear parasitic capacitances and charge injections of the switches. In some instances, what is needed therefore may be a new and novel successive approximation ADC architecture to remedy the deficiencies existing in the art as discussed above.